This Nonprovisional application claims priority under 35 U.S.C. §119(a) on patent application Ser. No(s). 092116443 filed in TAWIAN, R.O.C. on Jun. 17, 2003, the entire contents of which are hereby incorporated by reference.
1. Field of Invention
The invention relates to a field emission display device, and more particularly to a field emission display device for use with flat panel displays.
2. Related Art
Cathode ray tube (CRT) designs have been the predominant display technology on the market for their advantages and low cost. To satisfy the variety of information products recently available, the demand for flat panel displays is urgent. The current market trend is toward being compact and saving electricity. Thus CRTs have been replaced by flat panel displays.
The main technologies that apply to flat panel displays are plasma displays, liquid crystal displays, electroluminescent displays, light emitting diodes, vacuum fluorescent displays, field emission displays, and electrochromic displays.
Display factory owners have paid attention to the field emission display since the Laboratorie d'Electronique de Technologieet d'Instrumentation disclosed the field emission display technology at the fourth International Vacuum Microelectronics conference.
The light emitting mechanism of the FED devices is the same as that in cathode ray tubes. But the FED devices get rid of the bulky and heavy drawbacks normally together with CRTs but still have their advantages in terms of superior color resolution, contrast and brightness over 100 fL, high yield, and fast response times.
Due to the advantage of superior color resolution, FED devices are very clear in high brightness environments. Thus the major applications of FED devices technology have been for military purposes, such as displays for airplane GPS and radar. Because FED devices in a transient state respond very fast and do not lag, pilots can quickly track enemies through FED devices.
Electron amplification structures applied to the FED devices have been developed. Electron amplification structures are used to increase the electron amplification factors. The electron amplification factors of the FED devices increase over 100–1000 times to increase the brightness of the FED devices.
As shown in FIG. 1, the FED device disclosed in U.S. Pat. No. 5,982,082 contains: a faceplate 38, an anode layer 42, barrier layers 52 and 54, a light emitting layer 40, black matrix separations 44, an amplification enhancement layer 50, a biasing electrode 46, spacings 51 and a cathode emitter 36.
The amplification enhancement layer 50 is bombarded by electrons emitted from the cathode emitter 36 in order to generate secondary emission of electrons. The secondary emission of electrons bombards the light-emitting layer 40 to generate fluorescence, which transmits through the faceplate 38 for viewing.
While a single emitter 36 is schematically illustrated for servicing of a single display pixel location, it will be understood that a matrix or multiplicity of cathode emitters may be used for providing images.
An amplification layer 50 thickness of about 120 Angstroms is presently preferred for effective amplification as well as transmission of primary emission energies and current for high-brightness display operations. With this thickness it is not easy to fabricate the amplification layer 50, and the amplification effect of the amplification layer 50 is limited. Also, the spacings 51 need some elements to separate, the compression resistance is lower and the structure is complex. Thus such large-sized FED devices cannot be easily produced.
As shown in FIG. 2, the segmented cold cathode display panel disclosed in U.S. Pat. No. 5,751,109 features a channel plate 33 used for electron amplification. The channel plate 33 contains an input 60 and an output 62. The input 60 and output 62 of the channel plate 33 are biased, respectively, at voltages of approximately 20 volts and 1000 volts, where the potential is stated with respect to the ground (not shown). This means that the channel plate 33 is a resistance layer. The channel plate 33 employs electron multiplying technology that is well known to the art. By providing for multiple collisions between electrons and surfaces 41 that emit secondary electrons, gains of 10.sup.2 to 10.sup.4 in the flux of electrons may be achieved.
Even if there is no electron passing through the channel plate 33, the voltage potential between the input 60 and output 62 is large because of the finite resistance inside the channel plate 33. There is stationary power consumption (p=V2/R) inside the channel plate 33. Besides, the segmented cold cathode display panel cannot meet the requirement of high resolution due to the difficulties of fabrication.